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Dram timing configuration – Asus M3N78-EMH HDMI User Manual

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2-24

Chapter 2: BIOS setup

Channel Interleaving [Disabled]

Allows you to enable the channel memory interleaving.

Configuration options: [Disabled] [Address bits 6] [Address bits 12] [Hash*,

XOR of Address bits [20:16,6] ] [Hash*, XOR of Address bits [20:16,9] ]
Enable Clock to All DIMMs [Disabled]

Enables or disables clock to all DIMMs. Configuration options: [Disabled]

[Enabled]
MemClk Tristate C3/ALTVID [Disabled]

Enables or disables the MemClk Tristate C3/ALTVID.

Configuration options: [Disabled] [Enabled]
Memory Hole Remapping [Enabled]

Enables or disables the memory remapping around memory hole.

Configuration options: [Disabled] [Enabled]
DCT Unganged Mode [Always]

Allow you to enable or disable Unganed mode.

Configuration options: [Auto] [Always]
Power Down Enable [Enabled]

Enables or disables the DDR power down mode.

Configuration options: [Disabled] [Enabled]

DRAM Timing Configuration

DRAM Timing Configuration

Memory Clock Mode

[Auto]

DRAM Timing Mode

[Auto]

Options

Auto

Limit

Manual

Memory Clock Mode[Auto]

Allows you to set the memoery clock mode. Configuration options: [Auto]

[Limit] [Manual]
DRAM Timing Mode [Auto]

Allows you to set the DRAM timing mode. Configuration options: [Auto] [DCT

0]