Asus M5A78L-M LX V2 - Manual (Page 50)

2-12 Chapter 2: BIOS information
DRAM WRITE Recovery Time [Auto]
Configuration options: [Auto] [5 CLK] [6 CLK] [7 CLK] [8 CLK] [10 CLK] [12 CLK]
DRAM RAS# to RAS# Delay [Auto]
Configuration options: [Auto] [4 CLK] [5 CLK] [6 CLK] [7 CLK]
DRAM READ to WRITE Delay [Auto]
Configuration options: [Auto] [3 CLK] ~ [17 CLK]
DRAM WRITE to READ Delay(DD) [Auto]
Configuration options: [Auto] [2 CLK] ~ [10 CLK]
DRAM WRITE to READ Delay(SD) [Auto]
Configuration options: [Auto] [4 CLK] [5 CLK] [6 CLK] [7 CLK]
DRAM WRITE to WRITE Timing [Auto]
Configuration options: [Auto] [2 CLK] ~ [10 CLK]
DRAM READ to READ Timing [Auto]
Configuration options: [Auto] [3 CLK] ~ [10 CLK]
DRAM REF Cycle Time [Auto]
Configuration options: [Auto] [90ns] [110ns] [160ns] [300ns] [350ns]
DRAM Refresh Rate [Auto]
Configuration options: [Auto] [Every 7.8ms] [Every 3.9ms]
DRAM Command Rate [Auto]
Configuration options: [Auto] [1T] [2T]
Memory Over Voltage [Auto]
Sets the memory over voltage. The values range from 1.3500V to 2.3000V with a 0.0100V
increment. Use the <+> / <-> keys to adjust the value. Configuration options: [Auto] [Max. =
2.3000V] [Min. = 1.3500V]
Chipset Over Voltage [Auto]
Sets the chipset over voltage. The values range from 1.10000V to 1.60000V with a 0.01000V
increment. Use the <+> / <-> keys to adjust the value. Configuration options: [Auto]
[Max. = 1.60000V] [Min. = 1.10000V]
PCI/PCIe CLK Status [Enabled]
Enables or disables clock for PCI/PCIe slot. Configuration options: [Disabled] [Enabled]
2.4.2 CPU Configuration
The items in this menu show the CPU-related information that the BIOS automatically
detects.
GART Error Reporting [Disabled]
This option should remain disabled for the normal operation. The driver developer may
enable it for testing purpose. Configuration options: [Disabled] [Enabled]
Microcode Updation [Enabled]
Enables or disables Microcode Updation. Configuration options: [Disabled] [Enabled]