Asus M2N DH - Manual (Page 81)

ASUS M2N / M2N DH 4-21
4.4.2 CPU Configuration
The items in this menu show the CPU-related information that the BIOS
automatically detects.
CPU Configuration
Module Version: 13.05
AGESA Version: 02.06.09
Physical Count: 1
Logical Count : 1
AMD Opteron(tm) Processor 146
Revision: CG
Cache L1: 128KB
Cache L2: 1024KB
Speed : 2000MHz
Current FSB Multiplier: 10x
Maximum FSB Multiplier: 9X
Able to Change Freq : Yes
uCode Patch Level : None Required
GART Error Reporting [Disabled]
MTRR Mapping [Continuous]
Runtime Legacy PSB [Disabled]
Cool’n’Quiet [Enabled]
This option should
remain disabled for
the normal operation.
The driver developer
may enable it for
testing purpose.
GART Error Reporting [Disabled]
Enables or disables the GART Error reporting feature.
Configuration options: [Disabled] [Enabled]
MTRR Mapping [Continuous]
Sets the method used for programming CPU MTRRs when 4GB or more memory
is installed on the system. When set to Discrete, the BIOS leaves the PCI hole
below the 4GB boundary undescribed. Set to Continuous to describe the PCI hole
as non-cacheable. Configuration options: [Continuous] [Discrete]
Runtime Legacy PSB [Disabled]
Enables or disables the generation of Power State Block for use of PowerNow™
driver in a single core system. Configuration options: [Enabled] [Disabled]
Cool ‘N’ Quiet [Enabled]
Enables or disables the ASUS AMD Cool ‘n’ Quiet technology feature.
Configuration options: [Enabled] [Disabled]