Ordering information (continued), Pin configurations (continued), Chip information – Rainbow Electronics MAX1031 User Manual
Page 21
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC error consists of quantiza-
tion noise only. With an input range equal to the full-
scale range of the ADC, calculate the effective number
of bits as follows:
ENOB = (SINAD - 1.76) / 6.02
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the RMS
sum of the first five harmonics of the input signal to the
fundamental itself. This is expressed as:
where V1 is the fundamental amplitude, and V2–V5 are
the amplitudes of the first five harmonics.
Spurious-Free Dynamic Range
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next-largest distor-
tion component.
THD
20 x log
V
V
V
V
/ V
2
2
3
2
4
2
5
2
1
=
+
+
+
(
)
MAX1027/MAX1029/MAX1031
10-Bit 300ksps ADCs with FIFO,
Temp Sensor, Internal Reference
______________________________________________________________________________________
21
Ordering Information (continued)
PART
TEMP RANGE
PIN-PACKAGE
MAX1027BCEE-T
0°C to +70°C
16 QSOP
MAX1027BEEE-T
-40°C to +85°C
16 QSOP
MAX1029ACEP-T*
0°C to +70°C
20 QSOP
MAX1029AEEP-T*
-40°C to +85°C
20 QSOP
MAX1029BCEP-T
0°C to +70°C
20 QSOP
MAX1029BEEP-T
-40°C to +85°C
20 QSOP
MAX1031ACEG-T*
0°C to +70°C
24 QSOP
MAX1031AEEG-T*
-40°C to +85°C
24 QSOP
MAX1031BCEG-T
0°C to +70°C
24 QSOP
MAX1031BEEG-T
-40°C to +85°C
24 QSOP
MAX1031BCGI-T*
0°C to +70°C
28 QFN-EP**
MAX1031BEGI-T*
-40°C to +85°C
28 QFN-EP**
Pin Configurations (continued)
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
EOC
DOUT
DIN
CS
AIN3
AIN2
AIN1
AIN0
SCLK
V
DD
GND
REF+
AIN7
AIN6
AIN5
AIN4
16
15
14
13
9
10
11
12
CNVST/AIN15
REF-/AIN14
AIN13
AIN12
AIN11
AIN10
AIN9
AIN8
QSOP
MAX1031
28
27
26
25
24
23
22
8
9
10
11
12
13
14
AIN9
AIN2
AIN1
AIN0
N.C.
EOC
DOUT
DIN
AIN10
AIN11
AIN12
AIN13
REF-/AIN14
CNVST/AIN15
15
16
17
18
19
20
21
REF+
GND
N.C.
V
DD
N.C.
SCLK
CS
7
6
5
4
3
2
1
AIN8
AIN7
AIN6
AIN5
AIN4
AIN3
N.C.
MAX1031
QFN
TOP VIEW
*Future product—contact factory for availability.
**EP = Exposed paddle (connect to GND).
Chip Information
TRANSISTOR COUNT: 30,889
PROCESS: BiCMOS