Pin description – Rainbow Electronics MAX1638 User Manual

Page 6

MAX1638

High-Speed Step-Down Controller with
Synchronous Rectification for CPU Power

_______________________________________________________________________________________

PIN

High-Side Main MOSFET Switch Gate-Drive Output. DH is a floating driver output that swings from LX
to BST, riding on the LX switching-node voltage. See the section

BST High-Side Gate-Driver Supply

and MOSFET Drivers.

Switching Node. Connect LX to the high-side MOSFET source and inductor.

Power Ground

PGND

Low-Side Synchronous Rectifier Gate-Drive Output. DL swings between PGND and V

. See the

section

BST High-Side Gate-Driver Supply and MOSFET Drivers.

5V Power Input for MOSFET Drivers. Bypass V

to PGND within 0.2 in. (5mm) of the V

pin using a

0.1µF capacitor and 4.7µF capacitor connected in parallel.

PDRV

GlitchCatcher P-Channel MOSFET Driver Output. PDRV swings between V

and PGND.

NDRV

GlitchCatcher N-Channel MOSFET Driver Output. NDRV swings between V

and PGND.

D4, D3

Digital Inputs for Programming the Output Voltage

16, 17

FREQ

Frequency-Select Input. FREQ = V

: 1MHz

FREQ = REF: 600kHz
FREQ = AGND: 300kHz

CC2

Slow-Loop Compensation Capacitor Input. Connect a ceramic capacitor from CC2 to AGND. See the
section

Compensating the Feedback Loop.

BST

Boost-Capacitor Bypass for High-Side MOSFET Gate Drive. Connect a 0.1µF capacitor and low-leak-
age Schottky diode as a bootstrapped charge-pump circuit to derive a 5V gate drive from V

for DH.

NAME

FUNCTION

______________________________________________________________Pin Description

CC1

Fast-Loop Compensation Capacitor Input. Connect a ceramic capacitor and resistor in series from
CC1 to AGND. See the section

Compensating the Feedback Loop.

Voltage-Feedback Input. Connect FB to the CPU’s remote voltage-sense point. The voltage at this input
is regulated to a value determined by D0–D4.

PWROK

Open-Drain Logic Output. PWROK is high when the voltage on FB is within +8% and -6% of its set-
point.

CSL

Current-Sense Amplifier’s Inverting Input. Place the current-sense resistor very close to the controller IC,
and use a Kelvin connection.

CSH

Current-Sense Amplifier’s Noninverting Input

D2, D1,

Digital Inputs for Programming the Output Voltage. D0–D4 are logic inputs that set the output to a volt-
age between 1.3V and 3.5V (Table 2). D0–D4 are internally pulled up to V

with 5µA current sources.

5, 6, 7

Loop Gain-Control Input. LG is a three-level input that is used to trade off loop gain vs. AC load-regula-
tion and load-transient response. Connect LG to V

, REF, or AGND for 2%, 1%, or 0.5% AC load-reg-

ulation errors, respectively.

Analog Supply Input, 5V. Use an RC filter network, as shown in Figure 1.

REF

Reference Output, 3.5V. Bypass REF to AGND with 0.1µF (min). Sources up to 100µA for external
loads. Force REF below 2V to turn off the controller.

AGND

Analog Ground