Rainbow Electronics ADC1175 - Manual (Page 12)

Functional Description
The ADC1175 uses a new, unique architecture to achieve
7.2 effective bits at and maintains superior dynamic perfor-
mance up to
1 ⁄
2
the clock frequency.
The analog signal at V
IN
that is within the voltage range set
by V
RT
and V
RB
are digitized to eight bits at up to 30 MSPS.
Input voltages below V
RB
will cause the output word to
consist of all zeroes. Input voltages above V
RT
will cause the
output word to consist of all ones. V
RT
has a range of 1.0 Volt
to the analog supply voltage, AV
DD
, while V
RB
has a range of
0 to 4.0 Volts. V
RT
should always be at least 1.0 Volt more
positive than V
RB
.
If V
RT
and V
RTS
are connected together and V
RB
and V
RBS
are connected together, the nominal values of V
RT
and V
RB
are 2.6V and 0.6V, respectively. If V
RT
and V
RTS
are con-
nected together and V
RB
is grounded, the nominal value of
V
RT
is 2.3V.
Data is acquired at the falling edge of the clock and the
digital equivalent of the data is available at the digital outputs
2.5 clock cycles plus t
OD
later. The ADC1175 will convert as
long as the clock signal is present at pin 12. The Output
Enable pin OE, when low, enables the output pins. The
digital outputs are in the high impedance state when the OE
pin is high.
Applications Information
1.0 THE ANALOG INPUT
The analog input of the ADC1175 is a switch followed by an
integrator. The input capacitance changes with the clock
level, appearing as 4 pF when the clock is low, and 11 pF
when the clock is high. Since a dynamic capacitance is more
difficult to drive than a fixed capacitance, choose an amplifier
that can drive this type of load. The LMH6702, LMH6609,
LM6152, LM6154, LM6181 and LM6182 have been found to
be excellent devices for driving the ADC1175. Do not drive
the input beyond the supply rails.
Figure 3 shows an example of an input circuit using the
LM6181. This circuit has both gain and offset adjustments. If
you desire to eliminate these adjustments, you should re-
duce the signal swing to avoid clipping at the ADC1175
output that can result from normal tolerances of all system
components. With no adjustments, the nominal value for the
amplifier feedback resistor is 560
Ω and the 5.1k resistor at
the inverting input should be changed to 1.5k and returned to
+5V rather than to the Offset Adjust potentiometer.
Driving the analog input with input signals up to 2.8 V
P-P
will
result in normal behavior where signals above V
RT
will result
in a code of FFh and input voltages below V
RB
will result in
an output code of zero. Input signals above 2.8 V
P-P
may
result in odd behavior where the output code is not FFh
when the input exceeds V
RT
.
2.0 REFERENCE INPUTS
The reference inputs V
RT
(Reference Top) and V
RB
(Refer-
ence Bottom) are the top and bottom of the reference ladder.
Input signals between these two voltages will be digitized to
8 bits. External voltages applied to the reference input pins
should be within the range specified in the Operating Ratings
table (1.0V to AV
DD
for V
RT
and 0V to (AV
DD
- 1.0V) for V
RB
).
Any device used to drive the reference pins should be able to
source sufficient current into the V
RT
pin and sink sufficient
current from the V
RB
pin.
The reference ladder can be self-biased by connecting V
RT
to V
RTS
and connecting V
RB
to V
RBS
to provide top and
bottom reference voltages of approximately 2.6V and 0.6V,
respectively, with V
CC
= 5.0V. This connection is shown in
Figure 3. If V
RT
and V
RTS
are tied together, but V
RB
is tied to
analog ground, a top reference voltage of approximately
2.3V is generated. The top and bottom of the ladder should
be bypassed with 10µF tantalum capacitors located close to
the reference pins.
The reference self-bias circuit of Figure 3 is very simple and
performance is adequate for many applications. Superior
performance can generally be achieved by driving the refer-
ence pins with a low impedance source.
By forcing a little current into or out of the top and bottom of
the ladder, as shown in Figure 4, the top and bottom refer-
ence voltages can be trimmed. The resistive divider at the
amplifier inputs can be replaced with potentiometers. The
LMC662 amplifier shown was chosen for its low offset volt-
age and low cost. Note that a negative power supply is
needed for these amplifiers as their outputs may be required
to go slightly negative to force the required reference
voltages.
ADC1
175
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