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Ram/time chip interface figure 3, Rom/time chip interface figure 4 – Rainbow Electronics DS1215 User Manual

Page 5

background image

DS1215

032697 5/15

RAM/TIME CHIP INTERFACE Figure 3

CMOS STATIC RAM

ADD

DATA I/O

WE

OE

CE

DS1215

CEO

OE

WE

CEI

RST

BAT

1

X

1

BAT

2

X

2

V

CCO

D

Q

V

CCI

ROM/

RAM

+

+

BAT

1

BAT

2

32.768 KHz

4

14

13

11

3

12

10

9

7

6

15

+5 VDC

A0 – AN

D0 – D7

CE

RST

OR TIE TO GND FOR
ONE–BATTERY
OPERATION

V

CC

1

2

ROM/TIME CHIP INTERFACE Figure 4

ROM

ADD

DATA I/O

A2

OE

A0

DS1215

D

OE

WE

CEI

RST

BAT

1

X

1

BAT

2

X

2

CEO

Q

V

CCI

V

CCO

ROM/

RAM

+

+

BAT

1

BAT

2

1

2

32.768 KHz

4

14

13

11

3

12

6

9

16

7

10

+5 VDC

A0 – AN

D0 – D7

CE

RST

OR TIE TO GND FOR
ONE–BATTERY
OPERATION

CE

V

CC

OE

15