Rainbow Electronics DS1215 - Manual (Page 13)

DS1215
032697 13/15
NOTES:
1. All voltages are referenced to ground.
2. Measured with load shown in Figure 6.
3. Input pulse rise and fall times equal 10 ns.
4. t
WR
is a function of the latter occurring edge of WE or CE in RAM mode, or OE or CE in ROM mode.
5. t
DH
and t
DS
are functions of the first occurring edge of WE or CE in RAM mode, or OE or CE in ROM mode.
6. Measured without RAM connected.
7. Trip point voltage for power–fail detect. V
TP
= 1.26 x V
BAT
. For 10% V
CC
= 5V + 10% operation V
BAT
= 3.5V max.;
for 5% operation V
BAT
= 3.7V max.
8. I
CC01
is the maximum average load current the DS1215 can supply to memory.
9. Applies to CEO with the ROM/RAM pin grounded. When the ROM/RAM pin is connected to V
CCO
, CEO will go
to a low level as V
CCI
falls below V
BAT
.
10. I
CC02
is the maximum average load current that the DS1215 can supply to memory in the battery backup mode.
11. Applies to all input pins except RST. RST is pulled internally to V
CCI
.
OUTPUT LOAD Figure 6
+5V
50 pF
680 Ω
1.1K Ω