Rainbow Electronics DS1305 - Manual (Page 4)

DS1305
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SDI (Serial Data Input) – When SPI communication is selected, the SDI pin is the serial data input for
the SPI bus. When 3-wire communication is selected, this pin must be tied to the SDO pin (the SDI and
SDO pins function as a single I/O pin when tied together).
SDO (Serial Data Output) – When SPI communication is selected, the SDO pin is the serial data output
for the SPI bus. When 3-wire communication is selected, this pin must be tied to the SDI pin (the SDI and
SDO pins function as a single I/O pin when tied together).
CE (Chip Enable) – The chip enable signal must be asserted high during a read or a write for both 3-
wire and SPI communication. This pin has an internal 55k pulldown resistor (typical).
INT0 (Interrupt 0 Output) – The INT0 pin is an active low output of the DS1305 that can be used as an
interrupt input to a processor. The INT0 pin can be programmed to be asserted by only Alarm 0 or can be
programmed to be asserted by either Alarm 0 or Alarm 1. The INT0 pin remains low as long as the status
bit causing the interrupt is present and the corresponding interrupt enable bit is set. The INT0 pin operates
when the DS1305 is powered by V
CC1
, V
CC2
, or V
BAT
. The INT0 pin is an open drain output and requires
an external pullup resistor.
INT1 (Interrupt 1 Output) – The INT1 pin is an active-low output of the DS1305 that can be used as an
interrupt input to a processor. The INT1 pin can be programmed to be asserted by Alarm 1 only. The
INT1 pin remains low as long as the status bit causing the interrupt is present and the corresponding
interrupt enable bit is set. The INT1 pin operates when the DS1305 is powered by V
CC1
, V
CC2
, or V
BAT
.
The INT1 pin is an open-drain output and requires an external pullup resistor.
Both INT0 and INT1 are open-drain outputs. The two interrupts and the internal clock continue to run
regardless of the level of V
CC
(as long as a power source is present).
PF (Power-Fail Output) – The PF pin is used to indicate loss of the primary power supply (V
CC1
).
When V
CC1
is less than V
CC2
or is less than V
BAT
, the PF pin is driven low.
X1, X2 – Connections for a standard 32.768kHz quartz crystal. The internal oscillator is designed for
operation with a crystal having a specified load capacitance of 6pF. For more information on crystal
selection and crystal layout considerations, refer to Application Note 58, “Crystal Considerations with
Dallas Real-Time Clocks.” The DS1305 can also be driven by an external 32.768kHz oscillator. In this
configuration, the X1 pin is connected to the external oscillator signal and the X2 pin is floated.