Rainbow Electronics DS2431 - Manual (Page 3)

DS2431: 1024-Bit, 1-Wire EEPROM
3 of 23
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
I/O PIN, 1-Wire WRITE
Standard speed 60 120
Write-0 Low Time (Note 1) t
W0L
Overdrive speed (Note 13) 7 16
µs
Standard speed 5 15 -
ε
Write-1 Low Time
(Notes 1, 15)
t
W1L
Overdrive speed 1 2 -
ε
µs
I/O PIN, 1-Wire READ
Standard speed 5 15 -
δ
Read Low Time
(Notes 1, 16)
t
RL
Overdrive speed 1 2 -
δ
µs
Standard speed t
RL
+
δ 15 Read Sample Time
(Notes 1, 16)
t
MSR
Overdrive speed t
RL
+
δ 2
µs
EEPROM
Programming Current
I
PROG
(Note 17) 1 mA
Programming Time t
PROG
(Note 18) 12.5 ms
At 25°C 200k Write/Erase Cycles
(Endurance)
N
CY At 85°C (worst case) 50k
---
Data Retention t
DR
At 85°C (worst case) 10 years
Note 1: System requirement.
Note 2: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily
loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be required.
Note 3: Capacitance on the data pin could be 800pF when V
PUP
is first applied. If a 2.2k Ω resistor is used to pull up the data line, 2.5µs
after V
PUP
has been applied the parasite capacitance will not affect normal communications.
Note 4: Guaranteed by design, simulation only. Not production tested.
Note 5: V
TL
, V
TH
, and V
HY
are a function of the internal supply voltage.
Note 6: Voltage below which, during a falling edge on I/O, a logic 0 is detected.
Note 7: The voltage on I/O needs to be less or equal to V
ILMAX
whenever the master drives the line low.
Note 8: Voltage above which, during a rising edge on I/O, a logic 1 is detected.
Note 9: After V
TH
is crossed during a rising edge on I/O, the voltage on I/O has to drop by at least V
HY
to be detected as logic '0'.
Note 10: The I-V characteristic is linear for voltages less than 1V.
Note 11: Applies to a single DS2431 attached to a 1-Wire line.
Note 12: The earliest recognition of a negative edge is possible at t
REH
after V
TH
has been previously reached.
Note 13: Highlighted numbers are NOT in compliance with legacy 1-Wire product standards. See comparison table below.
Note 14: Interval during the negative edge on I/O at the beginning of a Presence Detect pulse between the time at which the voltage is
80% of V
PUP
and the time at which the voltage is 20% of V
PUP
.
Note 15: ε
represents the time required for the pullup circuitry to pull the voltage on I/O up from V
IL
to V
TH
.
Note 16: δ represents the time required for the pullup circuitry to pull the voltage on I/O up from V
IL
to the input high threshold of the bus
master.
Note 17: Current drawn from I/O during the EEPROM programming interval. The pullup circuit on I/O during the programming interval
should be such that the voltage at I/O is greater than or equal to Vpup(min). If Vpup in the system is close to Vpup(min) then a
low impedance bypass of Rpup which can be activated during programming may need to be added.
Note 18: Interval begins t
WiLMIN
after the leading negative edge on IO for the last timeslot of the E/S byte for a valid Copy Scratchpad
sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current drawn by the
device has returned from I
PROG
to I
L
.
LEGACY VALUES DS2431 VALUES
PARAMETER STANDARD SPEED OVERDRIVE SPEED STANDARD SPEED OVERDRIVE SPEED
MIN MAX MIN MAX MIN MAX MIN MAX
t
SLOT
(incl. t
REC
) 61µs (undef.) 7µs (undef.) 65µs
1)
(undef.) 9µs (undef.)
t
RSTL
480µs (undef.) 48µs 80µs 504µs 640µs 53µs 80µs
t
PDH
15µs 60µs 2µs 6µs 15µs 63µs 2µs 7µs
t
PDL
60µs 240µs 8µs 24µs 60µs 240µs 8µs 26µs
t
W0L
60µs 120µs 6µs 16µs 60µs 120µs 7µs 16µs
1)
Intentional change, longer recovery time requirement due to modified 1-Wire front end.
PIN DESCRIPTION
NAME FUNCTION
I/O 1-Wire Bus Interface. Open drain, requires external pullup resistor.
GND Ground Reference
N.C. Not Connected