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Rainbow Electronics MAX5362 User Manual

Page 9

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MAX5360/MAX5361/MAX5362

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

_______________________________________________________________________________________

9

Power-On Reset

The MAX5360/MAX5361/MAX5362 have a power-on
reset circuit to set the DAC’s output to 0 when V

DD

is

first applied or when V

DD

dips below 1.7V. This ensures

that unwanted DAC output voltages will not occur
immediately following a system startup, such as after a
loss of power. The output glitch on startup is typically
<50mV.

Shutdown Mode

The MAX5360/MAX5361/MAX5362 include a software-
controlled shutdown mode that reduces the supply cur-
rent to <1µA. All internal circuitry is disabled and an
internal 10k

Ω resistor is placed from OUT to GND to

ensure 0V at OUT while in shutdown. The device enters
shutdown in less than 5µs and exits shutdown in less
than 50µs.

Digital Section

Serial interface

The MAX5360/MAX5361/MAX5362 use a simple two-
wire serial interface requiring only two I/O lines (two-
wire bus) of a standard microprocessor (µP) port.
Figure 3 shows the timing diagram for signals on the 2-
wire bus.

The two bus lines (SDA and SCL) must be high when
the bus is not in use. The MAX5360/MAX5361/
MAX5362 are receive-only devices (slaves) and must
be controlled by a bus master device. Figure 4 shows a
typical application where multiple devices can be con-
nected to the bus provided they have different address
settings. External pullup resistors are not necessary on
these lines (when driven by push-pull drivers), though
the MAX5360/MAX5361/MAX5362 can be used in
applications where pullup resistors are required (such
as in I

2

C systems) to maintain compatibility with exist-

ing circuitry. The serial interface operates at SCL rates
up to 400kHz. The SDA state is allowed to change only
while SCL is low, with the exception of START and
STOP conditions as shown in Figure 5. Each transmis-
sion consists of a START condition sent by the bus
master device, followed by the MAX5360/MAX5361/
MAX5362’s preset slave address, a power-mode bit,

SCL

SDA

t

LOW

t

HIGH

t

F

t

R

t

HD

,

STA

t

HD

,

DAT

t

HD

,

STA

t

SU

,

DAT

t

SU

,

STA

t

BUF

t

SU

,

STO

START CONDITION

STOP CONDITION

REPEATED START CONDITION

START CONDITION

Figure 3. Two-Wire Serial Interface Timing Diagram

µC

SDA

SCL

R

S

*

V

DD

OFFSET ADJUSTMENT

THRESHOLD ADJUSTMENT

GAIN ADJUSTMENT

R

S

* IS OPTIONAL.

SCL

SDA

V

DD

OUT

MAX5360M

2V REFERENCE

SCL

SDA

V

DD

OUT

MAX5361N

4V REFERENCE

SCL

SDA

V

DD

OUT

MAX5362P

V

DD

REFERENCE

Figure 4. Typical Application Circuit