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2 cpu, Functional overview, Sh7285 – Renesas M3A-HS85 User Manual

Page 19

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Functional Overview

2.2 CPU

Rev.1.04 2008.7.10

2-3

REJ10J1564-0104

2

2.2 CPU

The M3A-HS85 contains the 32-bit RISC microcomputer SH7285 that operates with a maximum 100MHz of CPU

clock frequency. The SH7285 includes 768-Kbyte flash memory, and 32-Kbyte RAM, making it useful in a wide range

of applications from data processing to equipment control.

The M3A-HS85 can be operated with a maximum 100MHz of CPU clock frequency (external bus maximum 50

MHz) using a 12.5 MHz input clock.

Figure 2.2.1 shows the SH7285 block diagram in the M3A-HS85.

EXTAL
XTAL
PA15/CK

MD1
MD0

RES
NMI
WDTOVF

SH7285

Clock

Mode
SW

System
control

LED for
user

DIP
switch
for user

A/D

Address bus

Data bus

H-UDI

Serial port,
Extension connector
(J13)

AUD

PF0/AN0
PF1/AN1
PF2/AN2
PF3/AN3
PF4/AN4
PF5/AN5
PF6/AN6
PF7/AN7

PC0/A0/POE0

PC1/A1
PC2/A2
PC3/A3
PC4/A4
PC5/A5
PC6/A6
PC7/A7
PC8/A8
PC9/A9

PC10/A10
PC11/A11
PC12/A12

PC13/A13/IRQ0
PC14/A14/IRQ1
PC15/A15/IRQ2

PB0/A16/IRQ3

PB1/A17/REFOUT/ADTRG/IRQ4

PB6/A18/BACK/POE3/IRQ5/RXD0
PB7/A19/BREQ/POE4/IRQ6/TXD0

PB8/A20/WAIT/POE8/IRQ7/SCK0

PD0/D0
PD1/D1

PD2/D2/TIC5U

PD3/D3/TIC5V

PD4/D4/TIC5W

PD5/D5/TIC5US

PD6/D6/TIC5VS

PD7/D7/TIC5WS

PD8/D8/TIOC3AS

PD9/D9/TIOC3CS

PD10/D10/TIOC3BS

PD11/D11/TIOC3DS

PD12/D12/TIOC4AS
PD13/D13/TIOC4BS

PD14/D14/TIOC4CS
PD15/D15/TIOC4DS

PA0/RXD0/CS0/TDI

PA1/TXD0/CS1/TDO

PA2/SCK0/SCS/CS2/TCK

PA3/RXD1/SSI/CS3/TMS

PA4/TXD1/SSO/CS4/TRST

ASEMD0

PB2/SCL/POE1/IRQ0
PB3/SDA/POE2/IRQ1

PD16/IRQ0/CS3/AUDATA0

PD17/IRQ1/POE5/SCK3/CS2/AUDATA1

PD18/IRQ2/POE6/TXD3/CS1/AUDATA2

PD19/IRQ3/POE7/RXD3/CS0/AUDATA3

PD22/IRQ6/TIC5US/RXD4/AUDSYNC

PD24/DREQ0/TIOC4DS/AUDCK

USBXTAL
USBEXTAL
PB9/USPND
VBUS
USD+
USD-
PB10

PE9/TIOC3B/FRAME
PE11/TIOC3D
PE12/TIOC4A
PE13/TIOC4B/MRES
PE14/DACK0/TIOC4C/AH
PE15/DACK1/TIOC4D/IRQOUT

PE0/TIOC0A/TIOC4AS/DREQ0
PE1/TIOC0B/TIOC4BS/TEND0
PE2/TIOC0C/TIOC4CS/DREQ1
PE3/TIOC0D/TIOC4DS/TEND1

FWE/ASEBRKAK/ASEBRK

PD20/IRQ4/TIC5WS/SCK4/POE8
PD21/IRQ5/TIC5VS/TXD4
PD25/TIOC4CS/DREQ1
PD26/TIOC3BS/DACK1
PD27/TIOC4AS/DACK0
PD28/TIOC3DS
PD29/TIOC3BS
PD30/TIOC3CS/IRQOUT
PD31/TIOC3AS/ADTRG

PB11/RXD2/CS6/CS2/CS0/IRQ0
PB12/TXD2/CS7/CS3/CS1/IRQ1

PE4/TIOC1A/RXD3
PE5/TIOC1B/TIOC3BS/TXD3
PE6/TIOC2A/TIOC3DS/SCK3
PE7/TIOC2B/RXD2/BS/UBCTRG
PE8/TIOC3A/SCK2
PE10/TIOC3C/TXD2

PA5/SCK1/SSCK/CS5
PA6/TCLKA/RASL
PA7/TCLKB/SCK3/CASL
PA8/TCLKC/TXD3/RDWR
PA9/TCLKD/RXD3/CKE
PA12/WRH/DQMLU/POE8
PA13/WRL/DQMLL
PA14/RD
PA23/TIC5W/POE0/IRQ1/AH/CKE
PA22/TIC5V/CASU/POE4/IRQ2/CASL
PA21/TIC5U/RASU/POE8/IRQ3/RASL

FWE/ASEBRKAK/ASEBRK

Mode SW

H-UDI

PE4/TIOC1A/RXD3
PE5/TIOC1B/TIOC3BS/TXD3

Serial
port

Switch by JP7
and JP8

GPIO,
Control
signal,
MTU2/2S,
Interrupt,
etc

Figure 2.2.1 SH7285 Block Diagram

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