Renesas M32R-FPU - Manual (Page 176)

APPENDICES
APPENDICES-18 M32R-FPU Software Manual (Rev.1.01)
Appendix 5 IEEE754 Specification Overview
The following is a basic overview of the IEEE754 specification. M32R-FPU fulfills the
IEEE754 requirements through a combination of software and hardware features.
Appendix 5.1 Floating Point Formats
The following describes the floating-point formats.
APPENDIX 5
Appendix 5 IEEE754 Specification Overview
Appendix Figure 5.1.1 Floating-Point Formats
s: Sign bit. 0 = positive number, 1 = negative numbers
e: Exponent. This represents a value that was made positive by adding 127 to a single
precision value or 1023 to a double precision value (biased exponent).
f : Fraction. Represents the fraction field of the value.
Using these symbols, the floating-point values (normalized numbers) can be described
by the following expressions:
Single-Precision Format: (–1) ^ s ✕ 1.f ✕ 2 ^ (e–127)
Double-Precision Format: (–1) ^ s ✕ 1.f ✕ 2 ^ (e–1023)
• Certain values do not fit into the above expressions, such as
±∞
,
±
0, NaN (Not a
Number), denormalized numbers, etc.
• Other formats, such as expanded double precision, can also be used.
★ M32R-FPU only supports the single-precision format. The double precision format is
supported in the software library.
s (1 bit)
e (8 bit) Single Precision f (23 bit)
0 1 8 9 31
s (1 bit)
e (11 bit) Double Precision f (52 bit)
0 1 11 12 63