Philips SAA7345 - Manual (Page 22)

1998 Feb 16 22
Philips Semiconductors Product specification
CMOS digital decoding IC with RAM for
Compact Disc
SAA7345
PWM MODE , 4- LINE
Using two extra outputs from the Versatile Pins Interface, it is possible to use the SAA7345 with a 4-input motor bridge.
Figure 19 shows the timing and Fig.20 a typical application diagram.
CDV MODE
In the CDV motor mode, the FIFO position will be put in pulse-width modulated form on the MOTO1 pin (carrier frequency
300 Hz) and the PLL frequency signal will be put in pulse-density modulated form on the MOTO2 pin (carrier frequency
4.23 MHz). The integrated motor servo is disabled in this mode.
Remark:
The PWM signal on MOTO1 corresponds to a total memory space of 20 frames, therefore the nominal FIFO position
(half-full) will result in a PWM output of 60%.
Fig.19 Motor 4-line PWM mode timing.
MOTO1
MOTO2
V4
V5
rep
t = 45
µ
s t 240 ns
dead
ovl t = 240 ns
Accelerate Brake
MGA367 - 1
MGA364 - 2
VSS
+
M
MOTO1
V4
MOTO2
V5
100 nF 10
Ω
Fig.20 Motor 4-line PWM mode application diagram.