Kane Industries C6713CPU - Manual (Page 3)

H ARDWARE R EFERENCE G UIDE
MICRO - LINE
®
C6713CPU
Date : 28 November 2005
Doc. no. : C6713CPU_HRG
Iss./Rev : 1.1
Page : 3
3.3
Internal fast SRAM ............................................................................................................... 21
3.4 DSP Peripherals ................................................................................................................... 21
3.5 External SDRAM ................................................................................................................... 21
3.6 Flash Memory ....................................................................................................................... 21
3.7 Endianness ........................................................................................................................... 22
3.8 EMIF Configuration .............................................................................................................. 23
3.8.1 Default EMIF configuration.................................................................................................. 23
3.9 Description of the PLD Board Registers ............................................................................ 23
3.10 Description of the PLD Registers ..................................................................................... 24
3.10.1 Hardware Configuration Register (HWCFG) ..................................................................... 24
3.10.2 FPGA Control Register (FCR)........................................................................................... 25
3.10.3 LED Control Register (LED) .............................................................................................. 25
3.10.4 Module Control Register (MCR) ........................................................................................ 26
3.10.5 I 2 C Bus Control Register (I2C) .......................................................................................... 26
3.10.6 External Flag Register (XF)............................................................................................... 27
3.10.7 Watchdog Register (WDG)................................................................................................ 27
3.10.8 Version Register (VER) ..................................................................................................... 28
4 BOOT PROCESS AND DEFAULT SETUP OF THE C6713CPU................................ 29
5 USING THE FLASH FILE SYSTEM ............................................................................ 30
6 DESCRIPTION OF THE MICRO-LINE ® BOARD CONNECTORS .............................. 31
6.1 Location of the Connectors................................................................................................. 31
6.2 Connector Overview ............................................................................................................ 32
6.3 Pinout Tables of the micro-line ® Connector ...................................................................... 32
6.4 Pinout of the JTAG Connector ............................................................................................ 35
6.5 Function of the micro-line ® Connector Pins ...................................................................... 36
6.5.1 Connector A ........................................................................................................................ 36
6.5.2 Connector B ........................................................................................................................ 36
6.5.3 Connector BB ...................................................................................................................... 36
6.5.4 Connector D ........................................................................................................................ 37
6.5.5 Connector E ........................................................................................................................ 38
7 ENVIRONMENT .......................................................................................................... 44
7.1 Minimum Connections ......................................................................................................... 44
7.2 Changing the Board Configuration..................................................................................... 46
7.2.1 Location of modifiable components..................................................................................... 46
7.2.2 Configuring DSP Clock Speed ............................................................................................ 47