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Channelized stm1 to e1 pic – Juniper Networks M20 User Manual

Page 17

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Channelized STM1 to E1 PIC

JUNOS 4.4 and later

Software release

Four E3 ports

Power requirement: 0.32 A/48 V @ 15.3 W

63 E1 channels

Description

Each E1 channel supports a single High-level Data Link Control (HDLC) framer that can
be configured for speeds from DS0 (64 Kbps) through full E1 (2 Mbps) in 64-Kbps
increments

Onboard DSU functionality for E1 and fractional E1 connectivity

Integrated support for G.703 and unframed mode and G.704 framed mode with CRC;
this feature is user-configurable

Configurable clock source: Internal or loop

Per-port loop timing

Rate limiting on input and output

NxE1 service with Multilink Point-to-Point Protocol (MLPPP, RFC 1990) delivered by the
Link Services and Multilink Services PICs

Hardware features

SDH mapping:

Tributary Unit Group 3 (TUG-3)

E1 support:

Full instrumentation per E1 channel

Integrated support for G.703 unframed mode and G.704 framed mode

4-bit CRC for G.704 framed mode

HDB3 coding

Local E1 line loopback and remote line loopback

Per-channel BERT testing

Encapsulations:

Cisco High-level Data Link Control (HDLC)

Frame Relay

Multiprotocol Label Switching (MPLS) circuit cross-connect (CCC)

MPLS translational cross-connect (TCC)

Point-to-Point Protocol (PPP)

Software features

Channelized STM1 to E1 PIC

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Channelized STM1 to E1 PIC