Sundance SMT300Q v.1.6 - Manual (Page 60)

Page 60 of 61 SMT300Q SMT300Q User Guide V1.65
22 JTAG Interface circuits
The buffered JTAG circuit on the SMT300Q allows connection between SMT300Q
cards and other compatible carrier modules. This section describes the JTAG
interfacing circuitry to customers custom-built slave devices.
22.1 Signal Description
TDI : JTAG Test Data In. This signal is driven by the master device.
TDO : JTAG Test Data Out. This signal is driven by the slave device
(i.e. SMT300Q)
TMS : Test Mode Select. Driven by the master device.
TCK : JTAG Clock. Driven by the master
TCK_RET JTAG Clock Return, driven by the slave.
/TRST JTAG Reset, driven by the master.
/RESET Board Reset. Driven my master. (unused on SMT300Q)
PD Pod Detect signal.
This signal should be connected 3.3V or 5V on the slave device to
indicate to the master that an external device is present.
/DETECT This signal is pulled to GND by a master. If connecting two SMT300Q
together a jumper is used on one of the carriers (switching it to slave
mode) to prevent two masters being connected together.
CONFIG This signal is unused and should be left unconnected.
EMU0,EMU1 These are open collector JTAG emulation pins and should be
connected to the DSP. Pull-up resistors are required.
The JTAG circuit for a slave target board is shown in Figure 16. Using the correct
buffers and connectivity is essential to achieving a working JTAG interface.