Avago Technologies ACNT-H61L-000E - Manual (Page 3)

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AV02-4757EN - January 15, 2015
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Board Connection and Operation
A peaking capacitor (C1–C2, C4–C5) can be placed across
the input current limit resistor (R1–R4) to achieve en-
hanced speed performance (Figure 3). The capacitance
value depends on the rise/fall time of the input signal,
supply voltages and LED input driving current. Refer to
optocoupler’s datasheet for more details.
For ACNW261L (400mil DIP8 single-channel)
1. Attach 3.3 V or 5 V pulse input signal to “ANODE1”. Input
resistors are built-in.
2. Connect input ground at “CATHODE1”.
3. Attach 3.3 V or 5 V power supply at the isolated output
side “VDD1” and “GND1”.
4. Probe the output signals at “VO1”.
Figure 3. Connection of peaking cap (Cpeak) across input resistor to improve
speed performance
Figure 4. Recommended drive circuit for high CMR
The input cathode pins connect in series to case size 1206
SMD footpath. This allows split input resistors to connect
at both anode and cathode inputs for improved CMR per-
formance (Figure 4).
For ACNT-H61L (14.2mm Stretched SO8)
1. Attach 3.3 V or 5 V pulse input signal to “ANODE2”. Input
resistors are built-in.
2. Connect input ground at “CATHODE2”.
3. Attach 3.3 V or 5 V power supply at the isolated output
side “VDD2” and “GND2”.
4. Probe the output signals at “VO2”.
GND
2
V
DD2
0.1µF
GND
1
R
1
SHIELD
V
in
+
−
C
peak
V
0
R
2
V
DD
GND 2
V
DD2
0.1µF
GND 1
R
2
R 1
Shield
V
O
74LS04 or
any totem-pole
output
logic gate