Sundance SMT365 User Manual
Smt365, User manual
Table of contents
Document Outline
- Revision History
- Table of Contents
- Contacting Sundance
- Notational Conventions
- Outline Description
- Intended Audience
- Block Diagram
- Architecture Description
- DSP
- ZBTRAM
- FLASH
- Virtex FPGA
- Firmware versions
- Reprogramming the firmware and boot code
- Comports
- SHB
- Global bus
- LED Setting
- CONFIG & NMI
- Timer
- IIOF interrupt
- FPGA space availability
- Code Composer
- Application Development
- Operating Conditions
- Connector Positions
- Serial Ports & Other DSP I/O
- FPGA and CPLD JTAG
- FPGA configuration
- Virtex Memory Map
- SHB pinout
- Bibliography
- Index