Sundance FC203B User Manual
Page 8
Page 8 of 8
Revision 0.5
Sundance Digital Signal Processing Inc.
4790 Caughlin Parkway 233, Reno, NV 89519-0907, U.S.A.
Tel: +1 (775) 827-3103, Fax: +1 (775) 827-3664, email:
www.sundancedsp.com
STATUS_OUT
The module control/status word is driven on this channel; in this case all bits are passed
unchanged. Each input word on CTRL_IN generates a corresponding word output on
STATUS_OUT. This port is suitable for connecting to a HOST port for the purpose of system
state feedback or to another FC203B or FC203A sub-component for daisy-chained configuration.
3. KNOWN
ISSUES
At the time this is being written, there are two known limitations:
C = 1
If the FDMA Highway is configured for a single output channel then the internal pipeline does
not have enough cycles to work properly. If only a single channel is needed, it is necessary to set
C=2 and ignore the other channel.
If ENABLE has ‘1’s in higher bit positions than any ‘0’s
If the ENABLE control register is e.g. “1001” then as stated above only channels 7, 6, 1, and 0
will be enabled for output to the FDMA Highway output. This is in agreement with the original
spec., but for efficient use of the FDMA Highway bandwidth this may not be what is desired. In
this example, C must be at least 8 to allow all four enabled channels to be represented on the
highway, while channels 2-5 will be filled with zeros.
4. PRESENTATION
The firmware module is instantiated in a Diamond/FPGA configuration file as follows:
FC203B\
+---analysis\
Implementation Analysis
+---fc203b\
Task Source Code
+---memory\
CoreGen Memory modules
+---specifications\
Documentation
\---test\
Verification Test Benches
Users of the FC203B firmware module will reference the Diamond .fcd file (top level) from the
fc203b\ above.