Sundance SMT338-VP - Manual (Page 10)

Version 1.3 Page 10 of 22 SMT338-VP User Manual
CONFIG is driven from another TIM site on the carrier board, for instance, from a
DSP module running an application. (See
General Firmware Description for
information on the DSP TIM CONFIG signal).
After a Global Reset pulse, a DSP module drives CONFIG low and keeps it low by
default.
At power-up or on a TIM Reset or on a nConfig line going low, the state machine
goes into an INIT State.
From there, it has two choices depending on the state of the FPGA (configured i.e.
DONE pin high or un-programmed i.e. DONE Pin Low). To reconfigure the FPGA,
simply send a Start Key followed by the bitstream and then and End Key. To re-start
the FPGA with the current bitstream loaded, simply send a End Key.
Start Key = 0xBCBCBCBC and End Key = 0xBCBCBC00.
A TIM Reset can be issued to reconfigure the FPGA at anytime, but may reset other
modules as well. In the case of reconfiguring a particular module, the nConfig line is
used.
The SMT6500 software package provides a library of functions to configure the
FPGA via comport 3.