Vcntrl register – Sundance SMT128 User Manual
Page 8
Preliminary
Page 8 of 15
SMT128 User Manual
S0INT0
->
A logic ‘1’ when and interrupt occurs on the ModBus.
S0INT1
->
A logic ‘1’ when and interrupt occurs on the RS232 Port.
These interrupt signals must be cleared via the UART Registers.
VCNTRL Register
D7
D6
D5
D4
D3
D2
D1
D0
X X X
X X
MODINTEN
RST
UART
RST
FLASH
RST UART/RST FLASH: When these bits are high the motherboard UART or FLASH
is reset.
RST UART: When logic ‘1’ the UART is in a reset state.
RST FLASH: When logic ‘0’ the FLASH is in a reset state
MODINTEN: When high MODBUS interrupt is enabled on IIOF1 of DSP.
See also other documents in the category Sundance Equipment:
- SMT107 (16 pages)
- SMT6035 v.2.2 (39 pages)
- SMT6012 v.4.6 (22 pages)
- FC100 (12 pages)
- FC108 v.1.1 (10 pages)
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- SMT326v2 (24 pages)
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- SMT339 v.1.3 (27 pages)
- SMT338-VP (22 pages)
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- SMT351T (37 pages)
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