Memory map, Virtex registers, Wdog rst – Sundance SMT128 User Manual
Page 6: Wdog enable

Preliminary
Page 6 of 15
SMT128 User Manual
Memory Map
There are four basic motherboard resources, Virtex internal registers, FLASH RAM,
EEPROM and UART. Each of these resources is explained in the following sections.
Register
Global Address
Description
FLASH Memory
0xA0000000 -> 0xA003FFFF
FLASH Application/Boot space
EEPROM 0xA8000000
->
0xA80000FF
8 –bit Non-volatile parameter storage
Virtex Registers
0xB0000000 -> 0xB0000007
See Description below
UART 1
0xB8000000 -> 0xB8000007
ModBus interface
UART 2
0xB8000008 -> 0xB800000F
RS232 interface
Virtex Registers
Register
Global Address
Description
WDOG RST
0xB0000000
Writing to this register resets the watchdog
timer.
WDOG ENABLE
0xB0000001
Enables/Disables WDOG timer
DIGIN Register
0xB0000002
Read only, D0..D21 is state of digital I/P’s
DIGOUT Register
0xB0000003
Drives the digital O/P signals
VSTATUS
0xB0000004
Virtex Status Register
VCNTRL 0xB0000005
Virtex Control Register
WDOG RST
When the Watchdog timer is enabled (See WDOG ENABLE). This register must be
written to with a period of less than 1.6 seconds. If the register is not written to within
this period a global reset is initiated and the FAULT LED is activated. The fault LED
goes out next time the WDOG RST register is written to.
WDOG ENABLE
When writing to this register the level of the data line D0 selects either an internal
oscillator or a WDOG RST signal for the watchdog timer.
D0 -> logic 0 = Watchdog is reset using an internal oscillator.