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Ground terminals (agnd, dgnd), Synchronous dac load terminal (syncld), Counter terminal (ctr) – Measurement Computing USB-3101 User Manual

Page 16: Power terminal (+5v)

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USB-3101 User's Guide

Functional Details

16

For more information on digital signal connections

For more information on digital signal connections and digital I/O techniques, refer to the Guide to Signal
Connections
(available on our web site at

www.mccdaq.com/signals/signals.pdf

).

Digital I/O control terminal (DIO CTL) for pull-up/down configuration

All digital pins are floating by default. When inputs are floating, the state of unwired inputs are undefined (they
may read high or low). You can configure the inputs to read a high or low value when they aren’t wired. Use
the

DIO CTL

connection (pin 54) to configure the digital pins for pull-up (inputs read high when unwired) or

pull-down (inputs read low when unwired).

 To pull up the digital pins to +5V, wire the

DIO CTL

terminal pin to the

+5V

terminal pin (pin 56).

 To pull down the digital pins to ground (0 volts), wire the

DIO CTL

terminal pin to a

DGND

terminal pin

(pin 50, 53, or 55).

Ground terminals (AGND, DGND)

Eight analog ground (

AGND

) connections provide a common ground for all analog voltage output channels.

Three digital ground (

DGND

) connections provide a common ground for the

DIO

,

CTR

,

SYNCLD

and

+5V

connections.

Synchronous DAC load terminal (SYNCLD)

The synchronous DAC load connection (pin 49) is a bidirectional I/O signal that allows you to simultaneously
update the DAC outputs on multiple devices. You can use this pin for two purposes:

 Configure as an input (slave mode) to receive the D/A LOAD signal from an external source.

When the SYNCLD pin receives the trigger signal, the analog outputs are updated simultaneously.

SYNCLD pin must be logic low in slave mode for immediate update of DAC outputs

When the SYNCLD pin is in slave mode, the analog outputs can be updated immediately or when a positive
edge is seen on the SYNCLD pin (this is under software control.)

The SYNCLD pin must be at a low logic level for DAC outputs to update immediately. If the external source
supplying the D/A LOAD signal is pulling the SYNCLD pin high, no update will occur.

Refer to the "USB-3100 Series" section in the Universal Library User's Guide for information on how to
update DAC outputs immediately.

 Configure as an output (master mode) to send the internal D/A LOAD signal to the SYNCLD pin.

You can use the SYNCLD pin to synchronize with a second USB-3101 and simultaneously update the
DAC outputs on each device. Refer to

Synchronizing multiple units

section on page 17.

Use InstaCal to configure the SYNCLD mode as master or slave. On power up and reset the SYNCLD pin is
set to slave mode (input).

Refer to the "USB-3100 Series" section in the Universal Library User's Guide for information on how to
configure the USB-3101 with the Universal Library.

Counter terminal (CTR)

The

CTR

connection (pin 52) is the input to the 32-bit event counter. The internal counter increments when the

TTL levels transition from low to high. The counter can count frequencies of up to 1 MHz.

Power terminal (+5V)

The

+5 V

connection (pin 56) draws power from the USB connector. This terminal is a +5V output.

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