Measurement Computing PCI-COM232 User Manual
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4.2
Register Descriptions
4.2.1
INTERRUPT STATUS/CO NTROL
BADR1 + 4C hex
This register, and all 9052 registers, is 32 bits long. Since the rest of the register has specific control
functions, mask them off to access the interrupt control functions. INTE is the Interrupt Enable: 0 =
disabled, 1 = enabled (default). INTPOL is the Interrupt Polarity: 0 = active low (default), 1 = active high.
INT is the Interrupt Status: 0 = interrupt is not active, 1 = interrupt is active.
READ/WRITE
31:8
7
6
5
4
3
2
1
0
x
x
x
x
x
x
INT
INTPOL
INTE
The UART ports are 16C550 compatible. See any 16C550 data sheet for register functions.
AVAILABLE PORTS:
PCI-COM232:
PORT 1
PCI-COM232/2:
PORTS 1-2
PCI-COM232/4:
PORTS 1-4
4.2.2
PORT 1 CLOCK SELECT / INTERRUPT STATUS
BADR2 + 07 hex
READ
7
6
5
4
3
2
1
0
-
-
PORT1
CKSEL1
PORT1
CKSEL0
INT4
INT3
INT2
INT1
WRITE
7
6
5
4
3
2
1
0
-
-
PORT1
CKSEL1
PORT1
CKSEL0
-
-
-
-
INTx: Interrupt status for each port: the same signals are connected to this read register for all four ports.
CKSEL1:0 UART clock select. This allows transmission rates to 460.8 Kbaud and different rates on each
port. These settings are per port:
CKSEL1
CKSEL0
UART CLOCK
Max Data Rate
0
0
1.8432 MHz
115.2 kbaud
0
1
3.6864 MHz
230.4 kbaud
1
0
7.3728 MHz
460.8 kbaud