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Register map, 1 register map ove rview, 2 register descrip tions – Measurement Computing PCI-COM422/485 User Manual

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4.

REGISTER MAP

Although most users will take advantage of the COM driver supplied with the PCI-COM422/485 boards, the
following register map (Table 4-1) has information for users that may require it.

4.1

REGISTER MAP OVE RVIEW

Table 4-1. Register Map

REGISTER

READ FUNCTION

WRITE FUNCTION

Operations

BADR1+4Ch

Interrupt Status

Interrupt Control

32-bitDWORD

BADR2 + 0

Port 1 UART

Port 1 UART

8-bit BYTE

BADR2 + 1

Port 1 UART

Port 1 UART

8-bit BYTE

BADR2 + 2

Port 1 UART

Port 1 UART

8-bit BYTE

BADR2 + 3

Port 1 UART

Port 1 UART

8-bit BYTE

BADR2 + 4

Port 1 UART

Port 1 UART

8-bit BYTE

BADR2 + 5

Port 1 UART

Port 1 UART

8-bit BYTE

BADR2 + 6

Port 1 UART

Port 1 UART

8-bit BYTE

BADR2 + 7

Port 1 Clock Sel Register

Interrupt Status Register

8-bit BYTE

BADR3 + 0

Port 2 UART

Port 2 UART

8-bit BYTE

BADR3 + 1

Port 2 UART

Port 2 UART

8-bit BYTE

BADR3 + 2

Port 2 UART

Port 2 UART

8-bit BYTE

BADR3 + 3

Port 2 UART

Port 2 UART

8-bit BYTE

BADR3 + 4

Port 2 UART

Port 2 UART

8-bit BYTE

BADR3 + 5

Port 2 UART

Port 2 UART

8-bit BYTE

BADR3 + 6

Port 2 UART

Port 2 UART

8-bit BYTE

BADR3 + 7

Port 2 Clock Sel Register

Interrupt Status Register

8-bit BYTE

The single port PCI-COM422/485 board uses only Address range 1 and 2. The PCI-COM422/485/2 uses

Address range 1, 2 and 3.

4.2

REGISTER DESCRIP TIONS

4.2.1

INTERRUPT STATUS/CO NTROL

BADR1 + 4C hex

This register, and all 9052 registers, is 32 bits long. Since the remainder of the register has specific

control functions, they would need to be masked off in order to access the interrupt control functions:

INTE is the Interrupt Enable:

0 = disabled, 1 = enabled (default).

INTPOL is the Interrupt Polarity:

0 = active low (default), 1 = active high.

INT is the Interrupt Status:

0 = interrupt is not active, 1 = interrupt is active.