Advanced chipset settings, Output impedance control normal or weak – IBASE IB831 User Manual
Page 45
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BIOS SETUP
IB831 User’s Manual
41
Advanced Chipset Settings
This setting configures the north bridge and south bridge.
WARNING! Setting the wrong values may cause the system to
malfunction. -
BIOS SETUP UTILITY
Main
Advanced
PCIPnP
Boot
Security
Chipset
Exit
Advanced Chipset Settings
Configure North Bridge
features.
<- Select Screen
↑↓
Select Item
+- Change Field
Tab
Select Field
F1 General Help
F10 Save and Exit
ESC Exit
WARNING: Setting wrong values in below sections
may cause system to malfunction.
► North Bridge VIA VX900 Configuration
► South Bridge VIA VX900 Configuration
BIOS SETUP UTILITY
Main
Advanced
PCIPnP
Boot
Security
Chipset
Exit
DRAM Frequency/Timing Configuration
<- Select Screen
↑↓
Select Item
+- Change Field
Tab
Select Field
F1 General Help
F10 Save and Exit
ESC Exit
DRAM Clock
[Auto]
Bank Inter leave
[SPD]
Output Impedance Control
[Normal]
DDR2 Memory Chip ODT [DDR2/DDR [Auto]
DDR3 Dynamic ODT [Aut0]
VGA Share Memory (Frame Buffer) [256MB]
Internal VGA DVO Support
[Disabled]
CPU Direct Access Frame Buffer [Enable]
DRAM Clock
Auto, 400 MHz or 533 MHz
Bank Inter leave
SPD, Non-Page, 2-Way, 4-Way or 8-Way
Output Impedance Control
Normal or Weak