BECKHOFF KL5111-0000 - Manual (Page 16)

Register description
14 KL5111-0000
Bit Name Function
SB.7 RegAcc=0 Acknowledge for process data exchange
SB.6 - reserved
SB.5 - reserved
SB.4 Overflow This bit is set if an overflow (65535 to 0) of the 16-bit counter occurs.
It is reset if the counter exceeds a third of the measurement range
(21845 to 21846) or as soon as an underflow occurs.
SB.3 Underflow This bit is set if an underflow (0 to 65535) of the 16-bit counter
occurs. It is reset when the counter drops below two thirdds of the
measurement range (43690 to 43689) or as soon as an overflow
occurs.
SB.2 CntSet_Acc The data for setting the counter has been accepted from the terminal.
SB.1 RD_Period_Q if bit R32.8 of Feature Register is not set:
Die data bytes DataIN2, DataIN3 and DataIN4 contain the period
if bit R32.8 8 of Feature Register is set:
DataIN3 und DataIN4 contain the counted pulses
SB.0 Latch_Val A zero point latch has occurred. The data DIN3, DIN4 in the process
image corresponds to the latched value when the bit is set if the
period has not been requested. To reactivate the latch input,
EN_LATC must first be cancelled, acknowledgement of cancellation
must be waited for and then the bit must be set again. (Not used if
the V/R mode is active, i.e. bit 15 is set in the feature register).
or if bit 0 is set in the feature register:
Bit CB.7 CB.6 CB.5 CB.4 CB.3 CB.2 CB.1 CB.0
Name RegAcc - A-Signal B-Signal C-Signal CntSet_Acc RD_Period_Q Latch_Val
Bit Name Function
SB.7 RegAcc=0 Acknowledge for process data exchange
SB.6 - reserved
SB.5 A-Signal status of the input A
SB.4 B-Signal status of the input B
SB.3 C-Signal status of the input C
SB.2 CntSet_Acc The data for setting the counter has been accepted from the terminal.
SB.1 RD_Period_Q if bit R32.8 of Feature Register is not set:
Die data bytes DataIN2, DataIN3 and DataIN4 contain the period
if bit R32.8 8 of Feature Register is set:
DataIN3 und DataIN4 contain the counted pulses
SB.0 Latch_Val A zero point latch has occurred. The data DataIN3, DataIN4 in the
process image corresponds to the latched value when the bit is set if
the period has not been requested. To reactivate the latch input,
EN_LATC must first be cancelled, acknowledgement of cancellation
must be waited for and then the bit must be set again. (Not used if
the V/R mode is active, i.e. bit 15 is set in the feature register).