BECKHOFF KL3102 - Manual (Page 14)

Register description
14 KL3102
Status byte in
process data transfer
The status byte is transferred from the terminal to the controller. The status
byte contains various status bits of the analog input terminal KL3102:
Status byte:
Bit 7 = 0
Bit 6 = 1: ERROR – General error bit
Bit5 | Bit4
0 | 0 Limit 2 not activated
0 | 1 Process data less than Limit 2
1 | 0 Process data more than Limit 2
1 | 1 Process data equal to Limit 2
Bit3 | Bit2
0 | 0 Limit 1 not activated
0 | 1 Process data less than Limit 1
1 | 0 Process data more than Limit 1
1 | 1 Process data equal to Limit 1
Bit 1 = 1: Over range
Bit 0 = 1: Under range
Register communication KL3102
Register access via
process data transfer
Bit 7 = 1: register mode
When bit 7 of the control byte is set, the first two bytes of the user data are
not used for process data transfer, but are written into or read out of the
terminal’s register.
Bit 6 = 0: read
Bit 6 = 1: write
In bit 6 of the control byte, you define whether a register is to be read or
written. When bit 6 is not set, a register is read without modification. The
value can be taken from the input process image.
When bit 6 is set, the user data is written into a register. The operation is
concluded as soon as the status byte in the input process image has
supplied an acknowledgement (see examples).
Bits 0 to 5: address The address of the register to be addressed is entered in bits 0 to 5 of the
control byte.
Control byte in the
register mode
MSB
REG=1 W/R A5 A4 A3 A2 A1 A0
REG = 0: Process data transfer
REG = 1: Access to register structure
W/R = 0: Read register
W/R = 1: Write register
A5...A0 = Register address
A total of 64 registers can be addressed with the addresses A5....A0.