Hatteland Display 13 inch - HD 13T21 MMC (Widescreen, Inte Ato CPU) - Manual (Page 4)

DOC101200-2_AIPC_API_Registers_SMBus_Linux[1].docx - rev 03 – 2013-12-03 - Created by:6923
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Hatteland Display AS, Åmsosen, N-5578 Nedre Vats, Norway
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1 AIPC command registers
Command Device
Address
R/#W Register
Address
Input Data output
AIPC_ CFG0_W 0x20 0 0x06 0xFF
AIPC_ CFG1_W 0x20 0 0x07 0x8F
AIPC_READ_GPI 0x20 1 0x00 - 0xXX
AIPC_K2_EN
1) Read status of Reg.
0x03
0x20 1 0x03 - 0xXX
2) Write to reg. 0x03.
Bit 4=1. Rest as red
in 1).
0x20 0 0x03 0xXX
Bit 4 shall be set to 1.
Rest of the bits same
value as output from 1).
AIPC_K2_DIS
1) Read status of Reg.
0x03
0x20 1 0x03 - 0xXX
2) Write to reg. 0x03.
Bit 4=0. Rest as red
in 1).
0x20 0 0x03 0xXX
Bit 4 shall be set to 0.
Rest of the bits same
value as output from 1).
AIPC_HS1_EN
1) Read status of Reg.
0x03
0x20 1 0x03 - 0xXX
2) Write to reg. 0x03.
Bit 5=1. Rest as red
in 1).
0x20 0 0x03 0xXX
Bit 5 shall be set to 1.
Rest of the bits same
value as output from 1).
AIPC_HS1_DIS
1) Read status of Reg.
0x03
0x20 1 0x03 - 0xXX
2) Write to reg. 0x03.
Bit 5=0. Rest as red
in 1).
0x20 0 0x03 0xXX
Bit 5 shall be set to 0.
Rest of the bits same
value as output from 1).
AIPC_HS2_EN
1) Read status of Reg.
0x03
0x20 1 0x03 - 0xXX
2) Write to reg. 0x03.
Bit 6=1. Rest as red
in 1).
0x20 0 0x03 0xXX
Bit 6 shall be set to 1.
Rest of the bits same
value as output from 1).
AIPC_HS2_DIS
1) Read status of Reg.
0x03
0x20 1 0x03 - 0xXX
2) Write to reg. 0x03.
Bit 6=0. Rest as red
in 1).
0x20 0 0x03 0xXX
Bit 6 shall be set to 0.
Rest of the bits same
value as output from 1).