3 operation theory, 1 connection configuration, Connection configuration – ADLINK USB-3488A User Manual
Page 35: Figure 3-1: standard gpib connector, 3operation theory

Operation Theory
27
3
Operation Theory
This chapter describes the operation theory of GPIB bus and the
basic architecture of ADLINK’s GPIB interface cards.
3.1
Connection Configuration
The GPIB bus has 24 lines which are divided into 16 signal lines
and 8 ground return or shield drain lines. The 16 signal lines can
be divided into 8-bit parallel data transfer bus and 8 control lines.
The 8 control lines contain 5 system management lines and 3
handshake lines.
Figure 3-1: Standard GPIB Connector
See also other documents in the category ADLINK Hardware:
- USB-1901 (84 pages)
- USB-1210 (54 pages)
- USB-2401 (60 pages)
- USB-7230 (50 pages)
- USB-2405 (56 pages)
- DAQe-2010 (92 pages)
- DAQe-2204 (100 pages)
- DAQe-2213 (94 pages)
- DAQe-2501 (74 pages)
- PXI-2010 (84 pages)
- PXI-2020 (60 pages)
- PXI-2501 (62 pages)
- cPCI-9116 (98 pages)
- ACL-8112 Series (93 pages)
- ACL-8112 Series (94 pages)
- ACL-8112 Series (92 pages)
- ACL-8216 (75 pages)
- ACL-8111 (61 pages)
- PCM-9112+ (10 pages)
- PCM-9112+ (94 pages)
- cPCI-6216V (47 pages)
- ACL-6126 (28 pages)
- ACL-6128A (40 pages)
- PCM-6308V+ (52 pages)
- PCM-6308V+ (4 pages)
- PCI-7444 (82 pages)
- PCI-7434 (48 pages)
- PCI-7234 (56 pages)
- PCI-7260 (66 pages)
- PCI-7258 (38 pages)
- PCI-7256 (48 pages)
- PCI-7250 (48 pages)
- LPCI-7250 (48 pages)
- PCI-7396 (65 pages)
- PCI-7296 (59 pages)
- PCI-8554 (67 pages)
- PCIe-7360 (94 pages)
- PCIe-7350 (86 pages)
- PCIe-7300A (114 pages)
- PCIe-7200 (51 pages)
- PCI-7300A (112 pages)
- PCI-7300A (83 pages)
- PCI-7200 (96 pages)
- cPCI-7300 (82 pages)
- cPCI-7300 (83 pages)