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5 timebase, 1 internal reference clock, Data average mode – ADLINK PCIe-9852 User Manual

Page 31: Timebase, Internal reference clock, Figure 3-9, Re-trigger mode acquisition, Figure 3-10, Pcie-9852 clock architecture

5 timebase, 1 internal reference clock, Data average mode | Timebase, Internal reference clock, Figure 3-9, Re-trigger mode acquisition, Figure 3-10, Pcie-9852 clock architecture | ADLINK PCIe-9852 User Manual | Page 31 / 44 5 timebase, 1 internal reference clock, Data average mode | Timebase, Internal reference clock, Figure 3-9, Re-trigger mode acquisition, Figure 3-10, Pcie-9852 clock architecture | ADLINK PCIe-9852 User Manual | Page 31 / 44
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