ADLINK PXIS-2700 - Manual (Page 29)

Pin Assignments • 23
B.2 PXI / PCI Bus Architecture
PXI System Slot 1
Primary PCI Bus / Slot 2
Trigger Bus Controller
Primary PCI Bus / Slot 3
Primary PCI Bus / Slot 4
Primary PCI Bus / Slot 5
Primary PCI Bus / Slot 6 CBX-R3018L
Bridge
Board
Secondary PCI Bus / Slot 7
Secondary PCI Bus / Slot 8
Secondary PCI Bus / Slot 9
Secondary PCI Bus / Slot 10
Secondary PCI Bus / Slot 11
Secondary PCI Bus / Slot 12
CBX-R3018L
Bridge
Board
Third PCI Bus / Slot 13
Third PCI Bus / Slot 14
Third PCI Bus / Slot 15
Third PCI Bus / Slot 16
Third PCI Bus / Slot 17
Third PCI Bus / Slot 18
64-bit PCI
64-bit PCI
64-bit PCI
PXI Trigger bus
(Group 1)
PXI Trigger bus
(Group 2)
PXI Trigger bus
(Group 3)
z PXI data bus is daisy chained on all peripheral
slots.
z PXI 10MHz clock sources on all peripheral
slots are provided from backplane or trigger
slot controller.
z PXI Star-trigger are from trigger slot to
peripheral slot #3 to slot #15
z PXI trigger bus is divided into 3 groups.
10 MHz
Clock Source
To all slots
Daisy chained
PXI data bus