ADLINK PCIe-7300A - Manual (Page 9)

List of Figures v
List of Figures
Figure 2-1: PCI-7300A Layout Diagram..................................... 11
Figure 2-2: cPCI-7300A Layout Diagram................................... 12
Figure 2-3: PCIe-7300A Layout Diagram................................... 12
Figure 2-4: CN1 Pin Assignment ............................................... 16
Figure 4-1: Block diagram.......................................................... 35
Figure 4-2: Data flow of digital input .......................................... 36
Figure 4-3: Data flow of digital output ........................................ 36
Figure 4-4: Maximum data throughput....................................... 38
Figure 4-5: Scatter/gather DMA for digital output ...................... 40
Figure 4-6: Timer configuration.................................................. 41
Figure 4-7: DIREQ as input data strobe (Rising Edge Active) ... 48
Figure 4-8: DIREQ as input data strobe (Falling Edge Active) .. 49
Figure 4-9: DIREQ & DIACK Handshaking................................ 51
Figure 4-10: DOREQ as output data strobe................................. 54
Figure 4-11: DOREQ & DOACK Handshaking ............................ 56