ADLINK PCIe-7300A - Manual (Page 5)

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Table of Contents
List of Tables.......................................................................... iv
List of Figures ......................................................................... v
1 Introduction ........................................................................ 1
1.1 Applications ......................................................................... 2
1.2 Features............................................................................... 2
1.3 Specifications....................................................................... 3
1.4 Software Support ................................................................. 6
Programming Library ...................................................... 6
DAQ-LVIEW PnP: LabVIEW® Driver ............................. 6
PCIS-VEE: HP-VEE Driver ............................................. 7
DAQBenchTM: ActiveX Controls .................................... 7
2 Installation .......................................................................... 9
2.1 What You Have.................................................................... 9
2.2 Unpacking.......................................................................... 10
2.3 Device Installation for Windows Systems .......................... 10
2.4 cPCI/PCI/PCIe-7300A Layout............................................ 11
2.5 Hardware Installation Outline............................................. 13
2.6 Connector Pin Assignment ................................................ 14
2.7 Wiring and Termination..................................................... 17
2.8 Termination Board Support................................................ 18
Connect with DIN-100S ................................................ 18
Connect with DIN-502S ................................................ 18
3 Registers ........................................................................... 19
3.1 I/O Port Base Address ....................................................... 20
3.2 DI_CSR: DI Control & Status Register .............................. 22
3.3 DO_CSR: DO Control & Status Register ........................... 24
3.4 Auxiliary Digital I/O Register .............................................. 26
3.5 INT_CSR: Interrupt Control and Status Register............... 27
3.6 DI_FIFO: DI FIFO direct access port ................................. 28
3.7 DO_FIFO: DO external data FIFO direct access port........ 29
3.8 FIFO_CR: FIFO almost empty/full register ........................ 30
3.9 POL_CNTRL: Control Signal Polarity Control Register ..... 31
3.10 PLX PCI-9080 DMA Control Registers .............................. 32