ADLINK PCIe-7300A - Manual (Page 33)

Registers 23
DI_EN (R/W)
X 0: Disable digital inputs
X 1: Enable digital inputs
DI_FIFO_CLR (R/W)
X 0: No effect
X 1: Clear digital input FIFO. If both PORTA and PORTB are
configured as inputs, both FIFO will be cleared. Always get
0 when read.
DI_OVER (R/W)
X 0: DI FIFO does not full during input sampling
X 1: DI FIFO full during input sampling, some input data was
lost, write “1” to clear this bit
DI_FIFO_FULL (RO)
X 0: DI FIFO is not full
X 1: DI FIFO is full
DI_FIFO_EMPTY (RO)
X 0: DI FIFO is not empty
X 1: DI FIFO is empty