2 relay output control register – ADLINK PCI-7256 User Manual
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Register Format • 17
3.2 Relay Output Control Register
There are 16 latching relays on each PCI-7256 board. Each latching relay is
controlled by two bits of the control register. The setting (0,1) means the
latching relay is in RESET condition. Under the RESET condition, the normal
open(NO) signal line is ‘open’ from the common(COM) line and the normal
close(NC) signal line is connected with the common line. The setting (1,0)
means the normal open signal line is now closed, while the NC signal is open.
For safety operation, do not fill the register with (1,1) or it will cause an
uncertain output status of the relay.
For more information about the latching relay and software function library,
please refer to section 4.1 and 5.3, respectively.
Address: BASE + 0x00
Attribute: Write
7
6
5
4
3
2
1
0
DO3_S DO3_R DO2_S DO2_R DO1_S DO1_R DO0_S DO0_R
15
14
13
12
11
10
9
8
DO7_S DO7_R DO6_S DO6_R DO5_S DO5_R DO4_S DO4_R
Address:BASE + 0x02
Attribute: Write
7
6
5
4
3
2
1
0
DO11_S DO11_R DO10_S DO10_R DO9_S DO9_R DO8_S DO8_R
15
14
13
12
11
10
9
8
DO15_S DO15_R DO14_S DO14_R DO13_S DO13_R DO12_S DO12_R
DOx_R: Reset bit of relay output channel x, x=0~15
DOx_S: Set bit of relay output channel x, x=0~15