ADLINK ACL-6126 - Manual (Page 24)

18 • Registers Format
3.2 D/A Data Register
The D/A converter expects digital input data to be in binary right-
justified format, as shown in Figure 3.1.
X X X X D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
The base address from Base+0 to Base+11 are used for D/A
conversion. The analog output channels and its corresponding registers
are specified by table 4.2, and the details is described as table 4.3 and
4.4.
CH. No. #1 #2 #3 #4 #5 #6
High byte Base+0 Base+2 Base+4 Base+6 Base+8 Base+10
Low byte Base+1 Base+3 Base+5 Base+7 Base+9 Base+11
Table 4.2
Data Format :
D/A High byte data : (Base +0, +2, +4, +6, +8, +10)
Bit 7 6 5 4 3 2 1 0
X X X X D11 D10 D9 D8
Table 4.3
D/A Low byte data : (Base +1, +3, +5, +7, +9, +11)
Bit 7 6 5 4 3 2 1 0
D7 D6 D5 D4 D3 D2 D1 D0
Table 4.4
High Byte
Low