ADLINK ACL-6126 - Manual (Page 23)

Registers Format • 17
3
Registers Format
3.1 I/O Port Address
The ACL-6126 requires 16 consecutive addresses in the PC‘s I/O
address space. The starting address (Base) is selected on the DIP
switch SW1 ( see Section 2.5). The following table (Table 4.1) shows
the location of each register and its description.
Location Mode Description
Base + 0 Write D/A #1 high byte data
Base + 1 Write D/A #1 low byte data
Base + 2 Write D/A #2 high byte data
Base + 3 Write D/A #2 low byte data
Base + 4 Write D/A #3 high byte data
Base + 5 Write D/A #3 low byte data
Base + 6 Write D/A #4 high byte data
Base + 7 Write D/A #4 low byte data
Base + 8 Write D/A #5 high byte data
Base + 9 Write D/A #5 low byte data
Base + 10 Write D/A #6 high byte data
Base + 11 Write D/A #6 low byte data
Base + 12 Write D/O Bit 8-15
Base + 13 Write D/O Bit 0-7
Base + 14 Read D/I Bit 8-15
Base + 15 Read D/I Bit 0-7
Table 4.1 Registers Map