7 synchronizing multiple modules, Synchronizing multiple modules, Table 4-4: ssi timing – ADLINK PXI-2022 User Manual
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Function Block and Operation Theory
4.7
Synchronizing Multiple Modules
SSI (System Synchronization Interface) provides the DAQ timing
synchronization between multiple cards. In PXI-2020/2022 series,
we designed a bi-directional SSI I/O to provide flexible connection
between cards and allow one SSI master to output the signal and
up to three slaves to receive the SSI signal. Note that the SSI sig-
nals are designed for card synchronization only, not for external
devices.
The eight interconnected lines on PXI backplane named as PXI
Trigger Bus[0:7] provide a flexible interface for multiple modules
synchronization. The PXI-2020/2022 utilizes the PXI Trigger
Bus[0:7] as the System Synchronization Interface (SSI). By pro-
viding flexible routing of timebase clock and trigger signals onto
PXI Trigger Bus, the PXI-2020/2022 makes the synchronization
be-tween multiple modules easy and simple. The bi-directional
SSI I/Os provide a flexible connection between modules, which
allows one SSI master PXI-2020/2022 to output the SSI signals to
other slaves modules to receive the signals. Table 4-4 lists the
summary of SSI timing signals and the functionalities. Figure 4-15
shows the architecture of SSI. Note that it’s not allowed to route
different signals onto the same trigger bus line.
SSI Timing Signal
Functionality
SSI_TIMEBASE
SSI master: send the TIMEBASE out
SSI slave: accept the SSI_TIMEBASE to replace the internal TIME-
BASE signal.
Note: Affects A/D and operations
SSI_AD_TRIG
SSI master: send the internal AD_TRIG out
SSI slave: accept the SSI_AD_TRIG as the digital trigger signal.
SSI_ADCONV
SSI master: send the ADCONV out
SSI slave: accept the SSI_ADCONV to replace the internal ADCONV
signal.
Table 4-4: SSI Timing