4 advanced chipset setup – Acrosser AR-B1790 User Manual

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L2 Cache

This option specifies the caching algorithm used for L2 secondary (external) cache memory.

5.4 ADVANCED CHIPSET SETUP

This option controls the configuration of the board’s chipset. Control keys for this screen are the same as for the
previous screen.

Advanced Chipset Setup

DRAM Frequency

PC-200 means the memory bus is running at 200MHz. PC-266 means the memory bus is running at 266MHz.
The Choice: 200Mhz, 266Mhz

Configure SDRAM Timing by SPD

SPD is the abbreviation Serial Presence Detect. SPD takes accord the chip types, capacity, timing, voltage data.
The system can auto adjust memory according to the data to reach the best situation.
The Choice: Enabled, Disabled

CAS# Latency

This controls the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. Settings:
1.

5, 2, 2.5, 3 (clocks). 1.5 (clocks) increases the system performance the most while 3 (clocks) provides the most

stable performance.

RAS# to CAS# Delay

This field allows you to set the number of cycles for a timing delay

Precharge Delay

The field specifies the idle cycles before precharge an idle bank. Settings: 7, 6, 5 (clocks).

Hyper Threading Function

Enabling the functionality of Hyper-Threading Technology for your computer system requires

of the following

platforms. Components:

CPU - an Intel Pentium 4 Processor with HT Technology
Chipset - an Intel chipset that supports HT Technology
BIOS - a BIOS that supports HT Technology and has it enabled
OS - an operating system that includes optimizations for HT Technology

For more information on Hyper-Threading Technology, go to: