Dram specifications, Memory configurations, Levei z cache options – Asus PVI-486AP4 User Manual
Page 14: I fi, Connectors
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I fi
Memory Subsystem
DRAM Specifications:
See pLigfis 2-9
Memory Configurations
See pages Z - i o and 2-11 foj chart.
Levei Z Cache Options
See iuniper section for setlingSrChip speeds S size configurBLons..
Connectors
There dre several cannecters on iPie Ixwfd for switches end incJicaicr fights ifom
the system case The cunnectors are made ef (he sameoOTnpprtBftts as the
jumper svj itches. Thera Is also a double camectof fpr the ieeefs irom e systern
power supply and the connecior fat the on-hoani IDE contiral'er
SMI Switch
Cunn Ectar for the I edd (nom a Case-rnounted S uspend switcn
Tgrbo Switch Sfianetl for mourrmifn speed operetioo jdeiaultl. pr owiiieclor
tonhe lead from
a
case-mounled Turbo Switch
Turto LED
ConnEclor for the lead trern a case-tnoumed Turbo Switch
status indicatui LED.
Reset Swilcii Connector for the lesil hom
a
Reset switch mcunied on the
systerri case.
Spealief
Ccrnecinr for i he lead from a speaJea mounted i nside trie
systhm case.
KayLaeii
Connector for berth a case-rnounted tteyiboar-iJ Iqct and a
Power:Oni LEO. Pin 1 is liVB, pins 3 & í are gfounds.
PS/2 Moose
Connectoj for a lead irrtm a ca se-mouoied PS/3 moose port
JO f
Connector for a sotidard 4D-pin IDE ri btwn r;a b!a to connect
two internal IDE hard dislt drivoS: