Maxim Integrated Alameda (MAXREFDES24) ZedBoard - Manual (Page 3)

Alameda (MAXREFDES24#) ZedBoard Quick Start Guide
3
1. Required Equipment
• PC with Windows® OS with Xilinx® ISE®/SDK version 14.2 or later and two USB
ports (Refer to Xilinx AR# 52495 if you installed ISE WebPACK
TM
design
software on your PC.)
• License for Xilinx EDK/SDK version 14.2 or later (free WebPACK license is OK)
• Alameda (MAXREFDES24#) board
• ZedBoard TM
development kit
• One +24V 1A DC power supply
• One 750 Ω 0.25W resistor
2. Overview
Below is a high-level overview of the steps required to quickly get the Alameda design
running by downloading and running the FPGA project. Detailed instructions for each
step are provided in the following pages. The Alameda (MAXREFDES24#) subsystem
reference design will be referred to as Alameda throughout this document.
1) Connect the Alameda board to the JA1 and JB1 ports of a ZedBoard as shown in
Figure 1 . Ensure the connectors are aligned as shown in Figure 2 . The
communication between the Alameda board and the ZedBoard is through the
pins on the JB1 connector. The JA1 connector is for the board physical support
only.
2) Download the latest RD24V01_00.ZIP file located at the Alameda page.
3) Extract the RD24V01_00.ZIP file to a directory on your PC.
4) Open the Xilinx SDK.
5) Download the bitstream (.BIT) file to the board. This bitstream contains the FPGA
hardware design and software bootloader.
6) Use Xilinx SDK to download and run the executable file (.ELF) on one of the two
ARM
®
Cortex
TM
-A9 processors.