Make Noise Erbe Verb User Manual
Page 5

Erbe-Verb Panel Controls (cont’d)
6a. DEPTH Panel Control: bi-polar control for Depth and Type of Internal Modulation. Minimum modulation
at NOON. Cyclic modulation CCW from NOON. Ergodic modulation CW from NOON.
Shimmer at Full CW.
6b. DEPTH CV Attenuator: bi-polar attenuator for Depth CV IN.
6c. DEPTH CV IN: control signal input for Depth. Range +/- 5V.
7a. PRE-DELAY Panel Control: control for amount of Pre-Delay or Reverse time. Using internal clock,
operates as uni-polar with a range of 7ms - 500ms. Using ext. clock operates as bi-polar w/
divisors & multipliers of 1/12,1/8, 1/6, 1/4, 1/3, 1/2, 2/3, 1/1, 3/2, 2/1, 3/1, 4/1, 6/1, 8/1, 12/1
where 1/1 is at NOON.
7b. PRE-DELAY CV IN: control signal input for Pre-Delay. Range +/- 5V.
8a. TILT Panel Control: bi-polar control for Tilt. Low Gain +12 dB to -12 dB, High Gain -24dB to + 24dB,
unity at NOON.
8b. TILT CV Attenuator: bi-polar attenuator for Tilt CV IN.
8c. TILT CV IN: control signal input for Tilt. Range +/- 5V.
9a. ABSORB Panel Control: uni-polar control for Absorption. Full CCW = 0 diffusion, 0 damping;
10 o'clock = full diffusion, 0 damping; Full CW = full diffusion, full damping.
9b. ABSORB CV IN: control signal input for Absorption. Range +/- 5V.
10a. DECAY Panel Control: uni-polar control for Decay. 0 - 120% reflection gain. Infinity at Full CW.
10b. DECAY CV Attenuator: bi-polar attenuator for Decay CV IN.
10c. DECAY CV IN: control signal input for Decay. Range +/- 5V.
11a. REVERSE LED: visual indication of Reverse. Lights when Reverse is engaged, flickers to indicate Reverse buffer rate.
11b. REVERSE Gate IN: will Reverse on Gate HIGH. Momentary action. 1.5V trigger signal to operate.
11c. REVERSE Button: toggles Reverse on/ off. In Reverse Pre-Delay (7a, 7b) determines Reverse buffer size. Using int. clock: 42ms - 500ms, using ext. clock: 0.1ms - 5.46s synchronized
12a. TEMPO IN: allows synchronization of Echoes to multiple or division of an external Clock. While following external Tempo the Speed (5a, 5b, 5c) and Pre-Delay (7a, 7b) will be multiple or division of the incoming clock. Requires Clock/ Gate signal amplitude of at least 1.5V and width of at least 6ms.
13a. CV OUT LED: visual indication of the CV OUT signal.
13b. CV OUT: control signal representing the average energy of the algorithm. Range 0V - 10V
6b
6c
7b
6a
7a
8c
8a
8b
9b
9a