Intellijel Plog 1.0 - Manual (Page 5)

Plog rev 1.0 MANUAL
5
The D Flip-flop output latches to whatever logic level the input is but only when the CLK signal
transitions from low to high.
The CLK input is also normalled (via the switching jack) the inverted output of the D Flipflop. This
causes the D FlipFlop to function as a T Flip-flop if nothing is patched into the CLK input.
The following diagram illustrates the relationship between the D Flip-flop inputs and output.
Data (D) Flip-flop