Kontron AM5030 - Manual (Page 25)

AM5030 Introduction
ID 1036-3302, Rev. 1.0 Page 1 - 9
P R E L I M I N A R Y
1.5 Technical Specification
Table 1-2: AM5030 Main Specifications
AM5030 SPECIFICATIONS
Processor and Memory
CPU The AM5030 supports the following microprocessor:
• Intel® Xeon® LC5518 quad-core server processor, 1.73 GHz, 8 MB L3
cache, on a 1366-ball LGA socket
Further processor features:
• Four execution cores
• Simultaneous Multithreading Technology (SMT); 2 threads / core
• Intel® 64 Architecture
• Intel® Turbo Boost Technology
• Intel® Virtualization Technology (Intel® VT)
• System Memory interface with optimized support for triple-channel
DDR3 SDRAM memory at 1066 MHz with ECC
• Enterprise Southbridge Interface (ESI) to the Intel® 3420 chipset
• One x16 PCI Express 2.0 port operating at 5.0 GT/s or 2.5 GT/s
Please contact Kontron for further information concerning the suitability of
other Intel processors for use with the AM5030.
Memory Main Memory:
• Up to 24 GB triple-channel, unbuffered or registered DDR3 SDRAM
memory with ECC running at 1066 MHz (VLP DIMM modules)
Cache structure:
• 64 kB L1 cache for each core
• 32 kB for instruction cache
• 32 kB for data cache
• 256 kB L2 shared instruction / data cache with ECC for each core
• 8 MB L3 shared instruction / data cache with ECC shared between all
cores
FLASH Memory:
• Two redundant SPI Flash chips (2 x 8 MB) for uEFI BIOS controlled by
the MMC
Mass Storage Device:
• Up to 32 GB NAND Flash via an onboard SATA Flash module, optionally
available
Serial EEPROM with 64 kbit
Chi
pset
Intel® 3420 Intel® 3420 chipset:
• Eight x1 PCI Express 2.0 ports operating at 2.5 GT/s (only one PCI Ex-
press port is used on the AM5030)
• SATA host controller with six ports, 3 Gbit/s data transfer rate and
RAID 0/1/5/10 support
• USB 2.0 host interface with up to 12 USB ports available (only two USB
2.0 ports are used on the AM5030)
• SPI Flash interface support
• Low Pin Count (LPC) interface
• PCI interface, 32-bit/33 MHz (not used on the AM5030)
• Power management logic support
• Enhanced DMA controller, interrupt controller, and timer functions
• System Management Bus (SMBus) compatible with most I²C™ devices
• ESI interface to the processor
• Integrated RTC