Dell PowerEdge R630 - Manual (Page 11)

Dell - Internal Use - Confidential
Item How is data input to
this memory? How is this memory
write protected? How is the memory cleared?
via PLX Device Editor
or PLX EEP DOS based
tool. WPEN bit in status
register.
IDSDM
SPI Flash SPI interface via iDRAC Hardware strapping Not user clearable
MCU USB3.0 interface via
PCH N/A Not user clearable
x8 Control Panel
rSPI Flash SPI interface via iDRAC Hardware strapping Not user clearable
x10/x24 Control
Panel
rSPI Flash SPI interface via iDRAC Hardware strapping Not user clearable
iDRAC Quick Sync
MCU MSP430 I2C interface via iDRAC Hardware strapping
Not user clearable - It also auto-
clears when power is applied.
NOTE: For any information that you may need, direct your questions to your Dell Marketing contact.
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