Cirrus Logic AN353 User Manual
An353, De-coupling noise sources in the cs1601

Copyright
Cirrus Logic, Inc. 2011
(All Rights Reserved)
http://www.cirrus.com
Application Note
DE-COUPLING NOISE SOURCES IN THE CS1601
1. Introduction
The CS1501 & CS1601 are high-performance digital power factor correction (PFC) controllers designed for switching mode pow-
er supply (SMPS) & lighting applications. This paper deals with the issue of coupled noise to the controller, how to minimize it,
and how to filter it. Although only the CS1601 is referenced in this application note, all content is applicable to the CS1501 as well.
2. The Noise Issue
SMPS produce electronic noise — high-frequency spikes on DC voltages caused by the switching of current through parasitic
inductive & capacitive impedances. This noise can interfere with normal operation of the IC, causing false triggers and erratic
operation.
2.1 Practical Methods to Reduce Noise
The first step in minimizing noise is good layout. AN350 — CS1601 PCB Layout Guidelines gives instruction on how to optimize
layout for the CS1501/CS1601. The basic goal is to minimize trace impedances on the PCB for traces that switch high voltage
or current.
2.2 Basic Guidelines
All power traces should be as short & wide as possible (low impedance).
The trace between the GND pin of CS1601 and the V
link
capacitor should be as short as possible, and explicitly used for CS1601
GND return current.
2.3 Specific Problems
Factors such as design or topology choice, space limitations, or preferred process technology can limit the designer’s ability to
optimize the layout. Under such circumstances, further attention must be paid regarding de-coupling on the IC. Described below
are several specific circumstances that may cause certain performance issues. The problems that are caused are also described
along with suggested solutions.
Issue 1: GND cannot be linked directly to GND of V
link
cap.
Problem: CS1601 V
link
measurement may be prone to AC errors. The GND for CS1601 is now inductively coupled to
the “real” GND, the GND of the V
link
capacitor.
Solution: Place a capacitor from the IFB pin to the GND pin of CS1601, very close to the IC.
Issue 2: V
DD
comes from a noisy auxiliary winding.
Problem: Noise on V
DD
can couple to both the IAC & IFB pins.
Solution: Add decoupling caps between both the IAC & IFB pins and V
DD
, close to IC.
Issue 3: Driver requires instantaneous current to turn FET on.
Problem: Instantaneous energy requirement can cause V
DD
to droop at the IC pin.
Solution: Add a 2.2
µ
F minimum ceramic capacitor directly at pin 8 to act as storage device.
Issue 4: Current Sense pin (CS) “sees” a voltage waveform with noise.
Problem: The current sense pin can be sensitive to noise. Care needs to be exercised to make the “GND” of the sense
resistor the same as the “GND” of the IC.
Solution: Add a small capacitor at the CS pin. (Cont.)
AN353
JUL‘11
AN353REV2