Cirrus Logic CS61584A - Manual (Page 2)

CS61584A
2 TB261BPP1
Writing a byte to the RAM also takes two ac-
cesses; the first is a write with the Address/Com-
mand Byte set to indicate a RAM access. Using
the serial port, the Address/Command Byte is
0x18 for channel 1 and 0x19 for channel 2. If the
parallel port is being used, then the address is
0x08 for channel 1 and 0x09 for channel 2. This
is followed by another write, which has the de-
sired cell number (0x00 to 0x29) for its address,
and the new cell value for the data.
6. Select the RAM for output. This is done by set-
ting the CON[3:0] bits to the Arbitrary Wave-
form setting for E1/75
Ω
, E1/120
Ω
, DSX-1 or
DS-1 (see Table 1 of the datasheet). The output
waveform will now be driven by the AWG
RAM. The pulse shape can be modified further
by repeating steps 4 through 6.
Once the new output pulse shape is defined, the
AWG RAM can be loaded after power up by re-
peating step 5 and 6 with the predefined values.
Contacting Cirrus Logic Support
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http://www.cirrus.com/corporate/contacts/
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