An89 – Cirrus Logic AN89 User Manual
Page 7

AN89
AN89Rev2
7
**************************************************************************************
* Subroutines
**************************************************************************************
**************************************************************************************
* Routine - initialize
* Input
- none
* Output - none
* This subroutine initializes port D for interfacing to the CS5525/6/9 ADC.
* It provides a time delay for oscillator start-up/wake-up period.
* A typical start-up time for a 32768 Hz crystal, due to high Q, is 500 ms.
* Also 1003 XIN clock cycles are allotted for the ADC’s power on reset.
**************************************************************************************
initialize
LDA
#%01010000
; Load ACCA with for SPSC
STA
SPCR
; Setup SPI
LDA
#40
; Load ACCA with delay count
JSR
delay
; Delay, Power on Reset 1003 XIN
LDA
#220
; Load ACCA with delay count
JSR
delay
; Delay, Oscillator start-up 170 mS
JSR
delay
; Delay, Oscillator start-up 170 mS
JSR
delay
; Delay, Oscillator start-up 170 mS
LDX
#$0F
; Reset Serial Port on ADC
LDA
#$FF
; Load ACCA with $FF
loop
JSR
send_spi
; Move $FF to SPDR
DECX
; Decrement the counter
BNE
loop
; Repeat loop is counter not zero
LDA
#%11111110
; Load ACCA with last byte
JSR
send_spi
; Move $FE to SPDR
RTS
; Exit subroutine
**************************************************************************************
* Routine - calibrate
* Input
- none
* Output - none
* This subroutine instructs the CS5525/6/9 to perform self-calibration.
**************************************************************************************
calibrate
LDA
#$84
; set command byte for config write
STA
COMMANDBYTE
; set COMMAND BYTE
CLR
HIGHBYTE
; clear HIGHBYTE
CLR
MIDBYTE
; clear MIDBYTE
LDA
#$01
; get ready for self offset cal
STA
LOWBYTE
; set LOWBYTE
JSR
write_register
; Write to Config Register
LDA
#$94
; set command byte for config read
STA
COMMANDBYTE
; set COMMAND BYTE
poll_done: JSR
read_register
; Poll done flag until cal complete
BRCLR
3,LOWBYTE,poll_done; repeat if flag not set
RTS
; Exit subroutine